Basic Implementation of FPGA-GPU Dual SoC Hybrid Architecture for Low-Latency Multi-DOF Robot Motion Control
Yuya Nagamatsu,Fumihito Sugai,Kei Okada,Masayuki Inaba,Yuya Nagamatsu,Fumihito Sugai,Kei Okada,Masayuki Inaba
This paper describes basic implementation of an embedded controller board based on a hybrid architecture equipped with an Intel FPGA SoC and an NVIDIA GPU SoC. Embedded distributed network involving motor-drivers or other embedded boards is constructed with low-latency optical transmission link. The central controller for high-level motion planning is connected via Gigabit Ethernet. The controller...
