Signal Temporal Logic Synthesis as Probabilistic Inference
Ki Myung Brian Lee,Chanyeol Yoo,Robert Fitch,Ki Myung Brian Lee,Chanyeol Yoo,Robert Fitch
We reformulate the signal temporal logic (STL) synthesis problem as a maximum a-posteriori (MAP) inference problem. To this end, we introduce the notion of random STL (RSTL), which extends deterministic STL with random predicates. This new probabilistic extension naturally leads to a synthesis-as-inference approach. The proposed method allows for differentiable, gradient-based synthesis while exte...
